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Apple Macintosh Processor-Direct Slot (PDS) pinout

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Available on Apple Macintosh SE/30 & IIfx

120 pin Euro-DIN connector layout

120 pin Euro-DIN connector
at the motherboard



Cards in the PDS are accessed at 20MHz. This speed should let developers create PDS cards without using expensive components while still providing access to the processor bus. There are two locations in the memory map for PDS cards. Developers should see the "Cards and Drivers Manual" for information on creating PDS cards. This manual is available from APDA.

The cache connector in the Macintosh IIci may look like the Macintosh IIfx PDS connector, but the pinouts are vastly different.

Pin Name Description
A1resReserved
A2resReserved
A3/BUSLOCKBus Clock
A4/IRQ3Interrupt Request 3
A5/IPL2*68030 IPL2
A6/CIOUT*68030 Cache inhibit out
A7/STERM*Sync.cycle termination
A8/DSACK1*68030 Data ack 1
A9SIZ1transfer size bit 1
A10/BGACK*68030 bus grant ack
A11FC268030 function code 2
A12/RESET*System reset
A13D0Data bit 0
A14D2Data bit 2
A15D5Data bit 5
A16D8Data bit 8
A17D10Data bit 10
A18D13Data bit 13
A19D16Data bit 16
A20D18Data bit 18
A21D21Data bit 21
A22D24Data bit 24
A23D26Data bit 26
A24D29Data bit 29
A25A31address bit 31
A26A29address bit 29
A27A26address bit 26
A28A23address bit 23
A29A21address bit 21
A30A18address bit 18
A31A15address bit 15
A32A13address bit 13
A33A10address bit 10
A34A7address bit 7
A35A5address bit 5
A36A2address bit 2
A37+5V+5 VDC
A38CPUCLOCKCPU Clock
A39GNDGround
A40-12V-12 VDC
B1resReserved
B2GNDGround
B3/TM1A?
B4/IRQ2Interrupt Request 2
B5/IPL1*68030 IPL1
B6/DS*68030 Data Strobe
B7/CBACK*cache burst ack
B8/DSACK0*68030 Data ack 0
B9SIZ0Transfer Size bit 0
B10/BG*68030 bus grant
B11FC168030 function code 1
B12/BERR*Bus error
B13+5V+5 VDC
B14D3Data bit 3
B15D6Data bit 6
B16GNDGround
B17D11Data bit 11
B18D14Data bit 14
B19+5V+5 VDC
B20D19Data bit 19
B21D22Data bit 22
B22GNDGround
B23D27Data bit 27
B24D30Data bit 30
B25+5V+5 VDC
B26A28address bit 28
B27A25address bit 25
B28GNDGround
B29A20address bit 20
B30A17address bit 17
B31+5V+5 VDC
B32A12address bit 12
B33A9address bit 9
B34GNDGround
B35A4address bit 4
B36A1address bit 1
B37+5V+5 VDC
B38ECLK?
B39GNDGround
B40-5V-5 VDC
C1PWROFFPower Off?
C2/NUBUS?
C3/TM0A?
C4/IRQ1Interrupt Request 1
C5/IPL0*68030 IPL0
C6/RMC*68030 read modify cycle
C7/CBREQ*68030 cache burst req
C8R/W*68030 read write
C9/AS*68030 address strobe
C10/BR*68030 bus request
C11FC068030 function code 0
C12/HALT*68030 Halt
C13D1Data bit 1
C14D4Data bit 4
C15D7Data bit 7
C16D9Data bit 9
C17D12Data bit 12
C18D15Data bit 15
C19D17Data bit 17
C20D20Data bit 20
C21D23Data bit 23
C22D25Data bit 25
C23D28Data bit 28
C24D31Data bit 31
C25A30address bit 30
C26A27address bit 27
C27A24address bit 24
C28A22address bit 22
C29A19address bit 19
C30A16address bit 16
C31A14address bit 14
C32A11address bit 11
C33A8address bit 8
C34A6address bit 6
C35A3address bit 3
C36A0address bit 0
C37+5V+5 VDC
C38C16M16 MHz Clock
C39GNDGround
C40+12V+12 VDC

Below a table with differences found in the Apple Macintosh IIfx computers:

Pin Name Description
A1GND*Ground
A2/PDS.MASTER?
A3resReserved
A4n.c.Not connected
A38Reservedby Apple
B1ECSEarly cycle start
B2n.c.Not connected
B3/PDS.BG?
B4/IRQ15?
B38n.c.Not connected
B39/SLOT.E68030 slot E replace in address map
C1/PFWShutdown bit
C2n.c.Not connected
C3/PDS.BRBus request
C4/IRQ6?
C38CPUCLK*20 MHz clock


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Pinouts.ru > Buses and slots connectors pinouts >  Pinout of Apple Macintosh Processor-Direct Slot (PDS) and layout of 120 pin Euro-DIN connector
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Source(s) of this and additional information: Apple Tech Info Library 5744: Macintosh SE/30,IIfx: Processor-Direct Slot (PDS) Pinouts at Apple TIL homepage, from Hardware Book 0 reports
Last updated at Sat Jun 25 2005. Submit additions or corrections for this document. Is this document correct or incorrect? What is your opinion?
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