Hardware pinouts information and cables schemes

MSX Expansion pinout

motherboard connector

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49 47 45   5 3 1
+---------//-----+
| H H H  //H H H |
| ======//====== |
| H H H//  H H H |
+-----//---------+
 50 48 46  6 4 2
Pin Name Dir Description
1/CS1-->Memory Read in addresses 4000-7FFF
2/CS2-->Memory Read in addresses 8000-BFFF
3/CS12-->Memory Read in addresses 4000-BFFF
4/SLTSL-->Low when Slot 2 (cartridge slot) is selected
5n/c-Not connected.
6/RFSH-->Refresh signal from CPU
7/WAIT<--OC, Tells CPU to wait. Refresh signal is not maintained
8/INT<--OC, Requests a interrupt to CPU (call to addr 38h)
9/M1-->CPU fetches first part of instruction from memory.
10/BUSDIR<--NC, was used to control the data direction.
11/IORQ-->I/O request signal. (Address=Port)
12/MREQ-->Memory request signal. (Address=Address)
13/WR-->Write signal (strobe)
14/RD-->Read signal (strobe)
15/RESET<--Reset
16n/c-Not connected.
17A0-->Address 0
18A1-->Address 1
19A2-->Address 2
20A3-->Address 3
21A4-->Address 4
22A5-->Address 5
23A6-->Address 6
24A7-->Address 7
25A8-->Address 8
26A9-->Address 9
27A10-->Address 10
28A11-->Address 11
29A12-->Address 12
30A13-->Address 13
31A14-->Address 14
32A15-->Address 15
33D0<->Data 0
34D1<->Data 1
35D2<->Data 2
36D3<->Data 3
37D4<->Data 4
38D5<->Data 5
39D6<->Data 6
40D7<->Data 7
41GND---Ground
42CLOCK-->CPU clock, 3.579 MHz
43GND---Ground
44SW1-NC, Insert/remove detection for protection
45+5V-->+5 VDC (300mA max /slot)
46SW2-NC, Insert/remove detection for protection
47+5V-->+5 VDC (300mA max /slot)
48+12V-->+12 VDC (50mA max /slot)
49SOUNDIN<--Sound input (-5dBm)
50-12V-->-12 VDC (50mA max /slot)

Note: Direction is Computer relative Peripheral.


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Pinouts.ru > Motherboard connectors pinouts >  Pinout of MSX Expansion and layout of connector
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Source(s) of this and additional information: Mayer"s SV738 X"press I/O map, from Hardware Book 0 reports
Last updated at Sat Jun 25 2005. Submit additions or corrections for this document. Is this document correct or incorrect? What is your opinion?
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