Apple PowerBook ATA pinout

Pin	Name	Dir	Description
1	/RESET		Reset
2	GND		Ground
3	DD7		Data 7
4	DD8		Data 8
5	DD6		Data 6
6	DD9		Data 9
7	DD5		Data 5
8	DD10		Data 10
9	DD4		Data 4
10	DD11		Data 11
11	DD3		Data 3
12	DD12		Data 12
13	DD2		Data 2
14	DD13		Data 13
15	DD1		Data 1
16	DD14		Data 14
17	DD0		Data 0
18	DD15		Data 15
19	GND		Ground
20	KEY	-	Key (Pin missing)
21	DMARQ	?	DMA Request
22	GND		Ground
23	/DIOW, /STOP		Write Strobe
24	GND		Ground
25	/DIOR, /HDMARDY, HSTROBE
26	GND		Ground
27	IORDY, /DDMARDY, DSTROBE		I/O Ready,...
28	CSEL	?
29	/DMACK	?	DMA Acknowledge
30	GND		Ground
31	INTRQ		Interrupt Request
32	/IOCS16	?	obsolete, not used
33	/DA1		Address 1
34	/PDIAG, /CBLID	?	Passed Diagnostics
35	/DA0		Address 0
36	/DA2		Address 2
37	/CS0
38	/CS1
39	/DASP
40	GND		Ground
41	+5V LOGIC
42	+5V MOTOR
43	GND		Ground
44	Reserved

/DA(0�2) Device address; used by the computer to select one of the registers in the ATA drive. For more information, see the descriptions of the CS0 and CS1 signals.

DD(0�15) Data bus; buffered from IOD(16�31) of the computer�s I/O bus. DD(0�15) are used to transfer 16-bit data to and from the drive buffer. DD(8�15) are used to transfer data to and from the internal registers of the drive, with DD(0�7) driven high when writing.

/CBLID The host checks this signal after Power On or hardware reset to detect whether an 80-conductor cable is present.

/CS0 Register select signal. It is asserted low to select the main task file registers. The task file registers indicate the command, the sector address, and the sector count.

/CS1 Register select signal. It is asserted low to select the additional control and status registers on the ATA drive.

CSEL Cable select; not available on the iBook.

/DASP Device active or slave present; not available on the iBook.

/DDMARDY Drive ready to receive Ultra DMA data.

/DIOR I/O data read strobe.

/DIOW I/O data write strobe.

/DMACK Used by the host to initiate a DMA transfer in response to DMARQ.

DSTROBE Strobe for Ultra DMA data transfers to host.

/HDMARDY Ultra DMA data ready.

HSTROBE Strobe for Ultra DMA data transfers from host.

IORDY I/O ready; when driven low by the drive, signals the CPU to insert wait states into the I/O read or write cycles.

/IOCS16 I/O channel select; not used on this computer (pulled low by 1 kilohm resistor).

DMARQ Asserted by the device when it is ready to transfer data to or from the host.

INTRQ Interrupt request. This active high signal is used to inform the computer that a data transfer is requested or that a command has terminated.

/PDIAG Asserted by device 1 to indicate to device 0 that it has completed the power-on diagnostics; not available on the iBook.

/RESET Hardware reset to the drive; an active low signal.

/STOP Stop request; an active low signal.

Key This pin is the key for the connector.